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Formal Methods in Computer-Aided Design : First International Conference, FMCAD '96, Palo Alto, CA, USA, November 6 - 8, 1996, Proceedings / edited by Mandayam Srivas, Albert Camilleri
(Lecture Notes in Computer Science. ISSN:16113349 ; 1166)
版 | 1st ed. 1996. |
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出版者 | (Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer) |
出版年 | 1996 |
本文言語 | 英語 |
大きさ | X, 478 p : online resource |
著者標目 | Srivas, Mandayam editor Camilleri, Albert editor SpringerLink (Online service) |
件 名 | LCSH:Computer-aided engineering LCSH:Computer science LCSH:Computer engineering LCSH:Computer networks LCSH:Computers LCSH:Machine theory FREE:Computer-Aided Engineering (CAD, CAE) and Design FREE:Theory of Computation FREE:Computer Engineering and Networks FREE:Computer Hardware FREE:Computer Science Logic and Foundations of Programming FREE:Formal Languages and Automata Theory |
一般注記 | The need for formal methods for integrated circuit design -- Verification of all circuits in a floating-point unit using word-level model checking -- *BMDs can delay the use of theorem proving for verifying arithmetic assembly instructions -- Modular verification of multipliers -- Verification of IEEE compliant subtractive division algorithms -- Hierarchical verification of two-dimensional high-speed multiplication in PVS: A case study -- Experiments in automating hardware verification using inductive proof planning -- Verifying nondeterministic implementations of deterministic systems -- A methodology for processor implementation verification -- Coverage-directed test generation using symbolic techniques -- Self-consistency checking -- Inverting the abstraction mapping: A methodology for hardware verification -- Validity checking for combinations of theories with equality -- A unified approach for combining different formalisms for hardware verification -- Verification using uninterpreted functions and finite instantiations -- Formal verification of the Island Tunnel Controller using Multiway Decision Graphs -- VIS -- PVS: Combining specification, proof checking, and model checking -- HOL Light: A tutorial introduction -- A tutorial on digital design derivation using DRS -- ACL2 theorems about commercial microprocessors -- Formal synthesis in circuit design — A classification and survey -- Formal specification and verification of VHDL -- Specification of control flow properties for verification of synthesized VHDL designs -- An algebraic model of correctness for superscalar microprocessors -- Mechanically checking a lemma used in an automatic verification tool -- Automatic generation of invariants in processor verification -- A brief study of BDD package performance -- Local encoding transformations for optimizing OBDD-representations of finite state machines -- Decomposition techniques for efficient ROBDD construction -- BDDs vs. Zero-Suppressed BDDs: for CTL symbolic model checking of Petri nets -- HDL-based integration of formal methods and CAD tools in the PREVAIL environment This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a total of 65 submissions; also included are three invited survey papers and four tutorial contributions. The volume covers all relevant formal aspects of work in computer-aided systems design, including verification, synthesis, and testing HTTP:URL=https://doi.org/10.1007/BFb0031795 |
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電子ブック | オンライン | 電子ブック |
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Springer eBooks | 9783540495673 |
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EB00225798 |
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データ種別 | 電子ブック |
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分 類 | LCC:TA345-345.5 DC23:670.285 |
書誌ID | 4001090572 |
ISBN | 9783540495673 |